In such data-handling systems, e.g., as used in telecommunication, binary data words assigned to a multiplicity of channels in a recurrent scanning cycle or frame are processed in respective time slots with interim storage in corresponding memory stages, each stage consisting of a number of cells designed to receive the several bits of a data word to be inscribed therein. The contents of any stage may or may not be updated during a given cycle, i.e., the word previously stored therein may be reinscribed unaltered or may be replaced by another, depending on the activity of the respective channel.
The performance of such a memory may be conventionally monitored by logical circuitry designed to carry out a parity check, i.e., to determine whether there are an even or an odd number of unity bits -- of binary value "1" -- in a read-out word and/or in the address of the corresponding memory stage previously supplemented by a parity bit of the proper binary value. These parity checks enable a rapid detection of errors, either temporary malfunctions or systemic failures; the latter can be distinguished from the former by their recurrence in the same bit position in homologous time slots of consecutive scanning cycles. Thus, an alarm indication may be given if the parity check of a given channel has a negative outcome in two (or more) cycles immediately following one another.
There exists also the so-called echo-check method in which the contents of a memory stage are compared with the original data word as previously fed to that stage. In that case, however, each stage must be addressed twice for each word to be inscribed therein, with resulting lengthening of a scanning cycle. This technique, moreover, cannot be used for determining whether the memory has been correctly addressed, i.e. whether a data word has been written in the stage allocated to it.
The conventional parity-check method, too, has its limitations. Thus, if a malfunction of a memory cell distorts a data word by replacing a "1" with a "0" (or vice versa), and if that word is to be reinscribed in the stage from which it has been read out, then the parity check will fail only one since the reinscribed word will be accompanied by a matching parity bit and will undergo no further distortions in that stage. A systemic malfunction may, accordingly, be falsely interpreted as a temporary error.